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74HC20DB Datasheet(PDF) 7 Page - Nexperia B.V. All rights reserved |
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74HC20DB Datasheet(HTML) 7 Page - Nexperia B.V. All rights reserved |
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7 / 16 page ![]() 74HC_HCT20 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 3 — 3 September 2012 7 of 16 NXP Semiconductors 74HC20; 74HCT20 Dual 4-input NAND gate 11. Waveforms Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Waveforms showing the input (nA, nB, nC, nD) to output (nY) propagation delays and the output transition times Q$Q%Q& Q' LQSXW Q< RXWSXW 90 9; 9, W7+/ W7/+ 92+ 90 9< 92/ *1' DDD W3+/ W3/+ Table 8. Measurement points Type Input Output VM VM VX VY 74HC20 0.5VCC 0.5VCC 0.1VCC 0.9VCC 74HCT20 1.3 V 1.3 V 0.1VCC 0.9VCC Test data is given in Table 9. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. Fig 8. Test circuit for measuring switching times 001aah768 tW tW tr tr tf VM VI negative pulse GND VI positive pulse GND 10 % 90 % 90 % 10 % VM VM VM tf VCC DUT RT VI VO CL G |
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