1.

General description

The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low-power

Schottky TTL (LSTTL). The 74HC237 is specified in compliance with JEDEC

standard no. 7A.

The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address

inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit

storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active

LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present

at the inputs before this transition, is stored in the latches. Further address changes are

ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the

state of the outputs independent of the address inputs or latch operation. All outputs are

HIGH unless E1 is LOW and E2 is HIGH. The 74HC237 is ideally suited for implementing

non-overlapping decoders in 3-state systems and strobes (stored address) applications in

bus-oriented systems.

2.

Features and benefits

 Combines 3-to-8 decoder with 3-bit latch

 Multiple input enable for easy expansion or independent controls

 Active HIGH mutually exclusive outputs

 Low-power dissipation

 ESD protection:

 HBM JESD22-A114F exceeds 2 000 V

 MM JESD22-A115-A exceeds 200 V

 Multiple package options

 Specified from

40 Cto+85 C and from 40 Cto+125 C

3.

Ordering information

74HC237

3-to-8 line decoder, demultiplexer with address latches

Rev. 7 — 29 January 2016

Product data sheet

Table 1.

Ordering information

Type number

Package

Temperature range

Name

Description

Version

74HC237D

40 C to +125 C

SO16

plastic small outline package; 16 leads; body width

3.9 mm

SOT109-1

74HC237DB

40 C to +125 C

SSOP16

plastic shrink small outline package; 16 leads;

body width 5.3 mm

SOT338-1