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LT8686S Datasheet(PDF) 3 Page - Analog Devices |
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LT8686S Datasheet(HTML) 3 Page - Analog Devices |
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3 / 10 page ![]() 3 DEMO MANUAL DC3126A Rev. 0 QUICK START PROCEDURE 7. Once the proper output voltage is established, adjust the load within the operating ranges and observe the output voltage regulation, ripple voltage, efficiency, and other parameters. NOTE: When measuring the input or output voltage ripple, take care to avoid a long ground lead on the oscilloscope probe. Measure the output voltage ripple by touching the probe tip directly across the output capacitor. See Figure 2 for the proper scope technique. 8. An external clock can be added to the SYNC terminal when SYNC function is used (JP6 on the SYNC posi- tion). Use resistor R25 to set the LT8686S switching frequency close to the synchronization frequency. 9. (Option) Operation with Different Input Voltages The low voltage channels, channel 3 and channel 4, can operate with different input voltages instead of 5V VOUT1. The DC3126A provides and onboard 0Ω jumper (R29) to connect VIN_LV to VOUT1 by default. The 0Ω jumper can be removed to disconnect VIN_LVfromVOUT1.Applydifferentinputvoltagesfor channel 3 and channel 4 between VIN_LV and GND. NOTE: Make sure that the VIN_LV input voltage does not exceed 8V. 10. (Option)CombiningChannels(CH1+CH2,CH3+CH4) Configuration The DC3126A can combine two regulators to create channels with higher current ratings using a single inductor. Channel 1 and channel 2 can be combined to deliver up to 4A of output current. Similarly, channel 3 and channel 4 can be combined to deliver up to 4A of output current. Channel 1 and channel 3 are main channels, channel 2 and channel 4 are subordinates. The following simple modification is required: 1. Tie the SW1 and SW2 pins together with a low impedance connection. Tie SW3 and SW4 together with a low impedance connection. Since SW1 and SW2, SW3 and SW4 are connected, there is only one inductor needed for each output rail. Calculate and insert the inductors needed for L1 and L3, and remove L2 and L4. 2. Tie the BST1 and BST2 pins together with 0Ω resistors (R9, R12). Tie the BST3 and BST4 pins together with 0Ω resistors (R15, R18). 3. Tie the FB2 and FB4 pins to INTVCC with 0Ω resistors (R31, R32). Keep the resistor divider networks on the main channels and remove the resistor divider networks on subordinate channels. 4. Float (do not use) PG2 and PG4. Only PG1 and PG3 are active. 5. Float (do not use) TRK/SS2 and TRK/SS4. Only TRK/SS1 and TRK/SS3 are active. 6. Tie EN/UVLO and EN2 together with a 0Ω resistor (R27), EN3 and EN4 together with a 0Ω resistor (R30). |
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