74HC_HCT32

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Product data sheet

Rev. 6 — 3 December 2015

6 of 16

NXP Semiconductors

74HC32; 74HCT32

Quad 2-input OR gate

10. Dynamic characteristics

[1]

tpd is the same as tPHL and tPLH.

[2]

tt is the same as tTHL and tTLH.

[3]

CPD is used to determine the dynamic power dissipation (PD in W):

PD =CPD  VCC2  fi  N+  (CL  VCC2  fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

 (C

L  VCC

2

 f

o) = sum of outputs.

Table 7.

Dynamic characteristics

GND = 0 V; CL = 50 pF; for test circuit see Figure 7.

Symbol Parameter

Conditions

25

C

40 C to +125 C Unit

Min

Typ

Max

Max

(85

C)

Max

(125

C)

74HC32

tpd

propagation delay

nA, nB to nY; see Figure 6

[1]

VCC = 2.0 V

-

22

90

115

135

ns

VCC = 4.5 V

-

8

18

23

27

ns

VCC = 5.0 V; CL =15pF

-

6

-

-

-

ns

VCC = 6.0 V

-

6

15

20

23

ns

tt

transition time

see Figure 6

[2]

VCC = 2.0 V

-

19

75

95

110

ns

VCC = 4.5 V

-

7

15

19

22

ns

VCC = 6.0 V

-

6

13

16

19

ns

CPD

power dissipation

capacitance

per package; VI =GND to VCC

[3]

-16-

-

-

pF

74HCT32

tpd

propagation delay

nA, nB to nY; see Figure 6

[1]

VCC = 4.5 V

-

11

24

30

36

ns

VCC = 5.0 V; CL =15pF

-

9

-

-

-

ns

tt

transition time

VCC = 4.5 V; see Figure 6

[2]

-

7

15

19

22

ns

CPD

power dissipation

capacitance

per package;

VI =GND to VCC  1.5 V

[3]

-28-

-

-

pF