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74LVC2G66GD Datasheet(PDF) 11 Page - Nexperia B.V. All rights reserved |
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74LVC2G66GD Datasheet(HTML) 11 Page - Nexperia B.V. All rights reserved |
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11 / 26 page ![]() 74LVC2G66 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 9 — 15 December 2016 11 of 26 NXP Semiconductors 74LVC2G66 Bilateral switch 11.1 Waveforms and test circuit Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 17. Input (nY or nZ) to output (nZ or nY) propagation delays Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 18. Enable and disable times Table 10. Measurement points Supply voltage Input Output VCC VM VM VX VY 1.65 V to 1.95 V 0.5 V CC 0.5 V CC VOL + 0.15 V VOH 0.15 V 2.3 V to 2.7 V 0.5 V CC 0.5 V CC VOL + 0.15 V VOH 0.15 V 2.7V 1.5V 1.5 V VOL + 0.3 V VOH 0.3 V 3.0Vto 3.6V 1.5V 1.5 V VOL + 0.3 V VOH 0.3 V 4.5 V to 5.5 V 0.5 V CC 0.5 V CC VOL + 0.3 V VOH 0.3 V |
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