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ST10F269-Q3 Datasheet(PDF) 100 Page - STMicroelectronics |
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ST10F269-Q3 Datasheet(HTML) 100 Page - STMicroelectronics |
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100 / 160 page ![]() ST10F269 100/160 16.1 - RTC registers 16.1.1 - RTCCON: RTC Control Register The functions of the RTC are controlled by the RTCCON control register. If the RTOFF bit is set, the RTC dividers and counters clock is disabled and registers can be written, when the ST10 chip enters power down mode the clock oscillator will be switch off. The RTC has 2 interrupt sources, one is triggered every basic clock period, the other one is the alarm. RTCCON includes an interrupt request flag and an interrupt enable bit for each of them. This register is read and written via the XBUS. RTCCON (EC00h) XBUS Reset Value: --00h Notes: 1. As RTCCON register is not bit-addressable, the value of these bits must be read by checking their associated CCxIC register. The 2 RTC interrupt signals are connected to Port2 in order to trigger an external interrupt that wake up the chip when in power down mode. 2. All the bit of RTCCON are active high. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 - - - - - - - - RTCOFF - - - RTCAEN RTCAIR RTCSEN RTCSIR RW RW RW RW RW RTCOFF 2 RTC Switch Off Bit ‘0’: clock oscillator and RTC keep on running even if ST10 in power down mode ‘1’: clock oscillator is switch off if ST10 enters power down mode, RTC dividers and counters are stopped and registers can be written RTCAEN 2 RTC Alarm Interrupt ENable ‘0’: RTCAI is disabled ‘1’: RTCAI is enabled, it is generated every n seconds RTCAIR 1 RTC Alarm Interrupt Request flag (when the alarm is triggered) ‘0’: the bit was reseted less than a n seconds ago ‘1’: the interrupt was triggered RTCSEN 2 RTC Second interrupt ENable ‘0’: RTCSI is disabled ‘1’: RTCSI is enabled, it is generated every second RTCSIR 1 RTC Second Interrupt Request flag (every second) ‘0’: the bit was reseted less than a second ago ‘1’: the interrupt was triggered |
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