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ST72589BW Datasheet(PDF) 139 Page - STMicroelectronics

Part # ST72589BW
Description  8-BIT MCU WITH NESTED INTERRUPTS, DOT MATRIX LCD, ADC, TIMERS, PWM-BRM, SPI, SCI, I²C, CAN INTERFACES
PDF  158 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72589BW Datasheet(HTML) 139 Page - STMicroelectronics

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9 ELECTRICAL CHARACTERISTICS
9.1 ABSOLUTE MAXIMUM RATINGS
This product contains devices to protect the inputs
against damage due to high static voltages, how-
ever it is advisable to take normal precaution to
avoid application of any voltage higher than the
specified maximum rated voltages.
For proper operation it is recommended that VI
and VO be higher than VSS and lower than VDD.
Reliability is enhanced if unused inputs are con-
nected to an appropriate logic voltage level (VDD
or VSS).
Power Considerations. The average chip-junc-
tion temperature, TJ, in Celsius can be obtained
from:
TJ =TA + PD x RthJA
Where:
TA =
Ambient Temperature.
RthJA =Package thermal resistance
(junction-to ambient).
PD =
PINT + PPORT.
PINT =IDD x VDD (chip internal power).
PPORT =Port power dissipation
determined by the user)
Note: Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these conditions is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
General Warning: Direct connection to VDD or VSS of the RESET and I/O pins could damage the device in case of un-
wanted internal reset generation or program counter corruption (due to unwanted change of the I/O configuration). To
guarantee safe conditions, this connection has to be done through a typical 10K
Ω pull-up or pull-down resistor.
Thermal Characteristics
Symbol
Ratings
Value
Unit
VDD - VSS
Supply Voltage
6.5
V
VDDA - VSSA
Analog Reference Voltage
VDDA > VSS
6.5
V
VLCD
Max. Display Voltage
10.5
V
|VDD_i - VDD_j|
|VDD_i - VDDA|
Max. variations (Power Line)
50
mV
|VSS_i - VSS_j|
|VSS_i - VSSA|
|GLCD - VSS_i|
Max. variations (Ground Line)
50
mV
VIN
Input Voltage
VSS - 0.3 to VDD + 0.3
V
VOUT
Output Voltage
VSS - 0.3 to VDD + 0.3
V
ESD
ESD susceptibility
2000
V
IVDD_i
Total current into VDD_i (source)
80
mA
IVSS_i
Total current out of VSS_i (sink)
80
IINJ
Total injected current
+/- 5
Symbol
Ratings
Value
Unit
RthJA
Package thermal resistance
PQFP128
EQFP128
42
na
°C/W
TJmax
Max. Junction Temperature
150
°C
TSTG
Storage Temperature Range
-65 to +150
°C
PD
Power Dissipation
500
mW



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