ST72589BW datasheet(39/158 Pages) STMICROELECTRONICS

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6 MISCELLANEOUS REGISTERS

The Miscellaneous registers allow control over

several features such as external interrupts or the

I/O alternate functions.

6.1 I/O Port Interrupt Sensitivity Description

The external interrupt sensitivity is controlled by

the ISxx bits of the Miscellaneous registers (Figure

24). This control allows to have 2 fully independent

external interrupt source sensitivities.

Each external interrupt source can be generated

on four different events on the pin:

Falling edge

Rising edge

Falling and rising edge

Falling edge and low level

To guaranty the functionality, a modification of the

sensitivity in the MISCR registers can be done

only when the I1 and I0 bits of the CC register are

both set to 1 (level 3). See I/O port register and

Miscellaneous register descriptions for more de-

tails on the programming.

6.2 I/O Port Alternate Functions

The MISCR registers allow to manage three I/O

port miscellaneous alternate functions:

A Beep signal output on PC7 (with three

selectable audio frequencies)

A NMI management on a dedicated pin

A SPI SS pin internal control to use the PD3 I/O

port function while the SPI is active.

These functions are described in details in the

Section 6.3 Miscellaneous Registers Description.

Figure 24. External Interrupt Sources vs MISCR

EI1

INTERRUPT

SOURCE

EI3

INTERRUPT

SOURCE

IS10

IS11

MISCR1

SENSITIVITY

CONTROL

PA3

PA2

PA1

PA0

SOURCES

PB6

PB0

SOURCES

PD7

PD0

SOURCES

EI5

INTERRUPT

SOURCE

EI2

INTERRUPT

SOURCE

EI4

INTERRUPT

SOURCE

IS20

IS21

MISCR1

SENSITIVITY

CONTROL

PA7

PA6

PA5

PA4

SOURCES

PC7

PC0

SOURCES

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