MIC4103 datasheet(13/17 Pages) MICREL

13 / 17 page

Micrel

MIC4103/4104

October 2007

M9999-100107-B

Total power dissipation and Thermal Considerations

Total power dissipation in the MIC4103 or MIC4104 is

equal to the power dissipation caused by driving the

external MOSFETs, the supply current, and the internal

bootstrap diode.

total

drive

total

Pdiode

Pdiss

supply

The die temperature may be calculated once the total

power dissipation is known.

total

Pdiss

C/W)

(

air

ambient

junction

from

resistance

thermal

the

MIC4103/4

the

dissipatio

power

the

Pdiss

(

temperatur

junction

the

temperatur

ambient

maximum

the

total

where

Propagation Delay and Delay Matching and other

Timing Considerations

Propagation delay and signal timing is an important

consideration in a high performance power supply. The

MIC4103 is designed not only to minimize propagation

delay but to minimize the mismatch in delay between the

high-side and low-side drivers.

Fast propagation delay between the input and output drive

waveform is desirable. It improves overcurrent protection

by decreasing the response time between the control

signal

and

the

MOSFET

gate

drive.

Minimizing

propagation delay also minimizes phase shift errors in

power supplies with wide bandwidth control loops.

Many power supply topologies use two switching

MOSFETs operating 180º out of phase from each other.

These MOSFETs must not be on at the same time or a

short circuit will occur, causing high peak currents and

higher power dissipation in the MOSFETs. The MIC4103

and MIC4104 output gate drivers are not designed with

anti-shoot-through protection circuitry. The output drive

signals simply follow the inputs. The power supply design

must include timing delays (dead-time) between the input

signals to prevent shoot-through. The MIC4103 &

MIC4104 drivers specify delay matching between the two

drivers to help improve power supply performance by

reducing the amount of dead-time required between the

input signals.

Care must be taken to insure the input signal pulse width

is greater than the minimum specified pulse width. An

input signal that is less than the minimum pulse width may

result in no output pulse or an output pulse whose width is

significantly less than the input.

The maximum duty cycle (ratio of high side on-time to

switching period) is controlled by the minimum pulse width

of the low side and by the time required for the CB

capacitor to charge during the off-time. Adequate time

must be allowed for the CB capacitor to charge up before

the high-side driver is turned on.

Decoupling and Bootstrap Capacitor Selection

Decoupling capacitors are required for both the low side

(Vdd) and high side (HB) supply pins. These capacitors

supply the charge necessary to drive the external

MOSFETs as well as minimize the voltage ripple on these

pins. The capacitor from HB to HS serves double duty by

providing decoupling for the high-side circuitry as well as

providing current to the high-side circuit while the high-side

external MOSFET is on. Ceramic capacitors are

recommended because of their low impedance and small

size. Z5U type ceramic capacitor dielectrics are not

recommended due to the large change in capacitance over

temperature and voltage. A minimum value of 0.1uf is

required for each of the capacitors, regardless of the

MOSFETs being driven. Larger MOSFETs may require

larger capacitance values for proper operation. The

voltage rating of the capacitors depends on the supply

voltage, ambient temperature, and the voltage derating

used for reliability. 25V rated X5R or X7R ceramic

capacitors are recommended for most applications. The

minimum capacitance value should be increased if low

voltage capacitors are used since even good quality

dielectric capacitors, such as X5R, will lose 40% to 70% of

their capacitance value at the rated voltage.

Placement of the decoupling capacitors is critical. The

bypass capacitor for Vdd should be placed as close as

possible between the Vdd and Vss pins. The bootstrap

capacitor (CB) for the HB supply pin must be located as

close as possible between the HB and HS pins. The trace

connections must be short, wide, and direct. The use of a

ground plane to minimize connection impedance is

recommended. Refer to the section on layout and

component placement for more information.

The voltage on the bootstrap capacitor drops each time it

delivers charge to turn on the MOSFET. The voltage drop

depends on the gate charge required by the MOSFET.

Most MOSFET specifications specify gate charge vs. Vgs

voltage. Based on this information and a recommended

∆VHB of less than 0.1V, the minimum value of bootstrap

capacitance is calculated as:

the

drop

Voltage

∆

Charge

Gate

Total

where

gate

∆

≥

gate

The decoupling capacitor for the Vdd input may be

calculated with the same formula, however, the two

capacitors are usually equal in value.

Grounding, Component Placement, and Circuit Layout

Nanosecond switching speeds and ampere peak currents

MIC4103 Datasheet(PDF) 13 Page - Micrel Semiconductor

MIC4103 Datasheet(HTML) 13 Page - Micrel Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

Datasheet Download

Link URL