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AT90USB82 Datasheet(PDF) 131 Page - ATMEL Corporation |
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AT90USB82 Datasheet(HTML) 131 Page - ATMEL Corporation |
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131 / 306 page ![]() 131 7707D–AVR–07/08 AT90USB82/162 Note: 1. The CTCn and PWMn1:0 bit definition names are obsolete. Use the WGMn2:0 definitions. However, the functionality and location of these bits are compatible with previous versions of the timer. Table 15-4. Waveform Generation Mode Bit Description(1) Mo de WGM n3 WGM n2 (CTCn ) WGM n1 (PWM n1) WGM n0 (PWM n0) Timer/Counter Mode of Operation TOP Update of OCRn x at TOVn Flag Set on 0 0000 Normal 0xFFF F Immedi ate MAX 1 0001 PWM, Phase Correct, 8-bit 0x00F F TOP BOTTO M 2 0010 PWM, Phase Correct, 9-bit 0x01F F TOP BOTTO M 3 0011 PWM, Phase Correct, 10-bit 0x03F F TOP BOTTO M 4 0100 CTC OCRn A Immedi ate MAX 5 0101 Fast PWM, 8-bit 0x00F F TOP TOP 6 0110 Fast PWM, 9-bit 0x01F F TOP TOP 7 0111 Fast PWM, 10-bit 0x03F F TOP TOP 8 1000 PWM, Phase and Frequency Correct ICRn BOTTO M BOTTO M 9 1001 PWM, Phase and Frequency Correct OCRn A BOTTO M BOTTO M 10 1010 PWM, Phase Correct ICRn TOP BOTTO M 11 1011 PWM, Phase Correct OCRn A TOP BOTTO M 12 1100 CTC ICRn Immedi ate MAX 13 1101 (Reserved) – – – 14 1110 Fast PWM ICRn TOP TOP 15 1111 Fast PWM OCRn A TOP TOP |
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