 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AT90USB82 Datasheet(PDF) 58 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT90USB82 Datasheet(HTML) 58 Page - ATMEL Corporation |
|
|
58 / 306 page  58 7707D–AVR–07/08 AT90USB82/162 • Bit 7-4 - Reserved bits These bits are reserved and will always read as zero. • Bit 3 - WDEWIF: Watchdog Early Warning Interrupt Flag This bit is set when a first time-out occurs in the Watchdog Timer and if the WDEWIE bit is enabled. WDEWIF is automatically cleared by hardware when executing the corresponding interrupt handling vector. Alternatively, WDIF can be cleared by writing a logic one to the flag. When the I-bit in SREG and WDEWIE are set, the Watchdog Time-out Interrupt is executed. • Bit 2 - WDEWIE: Watchdog Early Warning Interrupt Enable When this bit has been set by software, an interrupt will be generated on the watchdog interrupt vector when the Early warning flag is set to one by hardware. • Bit 1:0 - WCLKD[1:0]: Watchdog Timer Clock Divider – WCLKD = 0 : Clk WDT = Clk128k – WCLKD = 1 : Clk WDT = Clk128k / 3 – WCLKD = 2 : ClkWDT = Clk128k / 5 – WCLKD = 3 : Clk WDT = Clk128k / 7 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
