DS87C520 datasheet(9/42 Pages) DALLAS

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DS87C520/DS83C520

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MEMORY RESOURCES

Like the 8051, the DS87C520/DS83C520 uses three memory areas. The total memory configuration of

the DS87C520/DS83C520 is 16 kB of ROM, 1 kB of data SRAM and 256 bytes of scratchpad or direct

RAM. The 1 kB of data space SRAM is read/write accessible and is memory mapped. This on-chip

SRAM is reached by the MOVX instruction. It is not used for executable memory. The scratchpad area is

256 bytes of register mapped RAM and is identical to the RAM found on the 80C52. There is no conflict

or overlap among the 256 bytes and the 1 kB as they use different addressing modes and separate

instructions.

OPERATIONAL CONSIDERATION

The erasure window of the windowed CERDIP should be covered without regard to the

programmed/unprogrammed state of the EPROM. Otherwise, the device may not meet the AC and DC

parameters listed in the datasheet.

PROGRAM MEMORY ACCESS

On-chip ROM begins at address 0000h and is contiguous through 3FFFh (16 kB). Exceeding the

maximum address of on-chip ROM will cause the device to access off-chip memory. However, the

maximum on-chip decoded address is selectable by software using the ROMSIZE feature. Software can

cause the DS87C520/DS83C520 to behave like a device with less on-chip memory. This is beneficial

when overlapping external memory, such as Flash, is used. The maximum memory size is dynamically

variable. Thus a portion of memory can be removed from the memory map to access off-chip memory,

then restored to access on-chip memory. In fact, all of the on-chip memory can be removed from the

memory map allowing the full 64 kB memory space to be addressed from off-chip memory. ROM

addresses that are larger than the selected maximum are automatically fetched from outside the part via

Ports 0 and 2. A depiction of the ROM memory map is shown in Figure 2.

The ROMSIZE register is used to select the maximum on-chip decoded address for ROM. Bits RMS2,

RMS1, RMS0 have the following affect.

RMS2

RMS1

RMS0

Maximum on-chip ROM Address

0 kB

1 kB/03FFh

2 kB/07FFh

4 kB/0FFFh

8 kB/1FFFh

16 kB (default)/3FFFh

Invalid - reserved

The reset default condition is a maximum on-chip ROM address of 16 kB. Thus no action is required if

this feature is not used. When accessing external program memory, the first 16 kB would be inaccessible.

To select a smaller effective ROM size, software must alter bits RMS2-RMS0. Altering these bits

requires a Timed Access procedure as explained later.

Care should be taken so that changing the ROMSIZE register does not corrupt program execution. For

example, assume that a DS87C520/DS83C520 is executing instructions from internal program memory

near the 12 kB boundary (~3000h) and that the ROMSIZE register is currently configured for a 16 kB

internal program space. If software reconfigures the ROMSIZE register to 4 kB (0000h-0FFFh) in the

current state, the device will immediately jump to external program execution because program code

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