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C164CL Datasheet(PDF) 49 Page - Infineon Technologies AG

Part # C164CL
Description  16-Bit Single-Chip Microcontroller
PDF  484 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C164CL Datasheet(HTML) 49 Page - Infineon Technologies AG

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C164CI/C164SI
Derivatives
Memory Organization
User’s Manual
3-11
V3.1, 2002-02
3.5
Crossing Memory Boundaries
The address space of the C164CI is implicitly divided into equally sized blocks of
different granularity and into logical memory areas. Crossing the boundaries between
these blocks (code or data) or areas requires special attention to ensure that the
controller executes the desired operations.
Memory Areas are partitions of the address space assigned to different kinds of
memory (if provided at all). These memory areas are the Internal RAM/SFR area, the
internal ROM/Flash/OTP (if available), the on-chip X-Peripherals (if integrated), and the
external memory.
Accessing subsequent data locations which belong to different memory areas is no
problem. However, when executing code, the different memory areas must be switched
explicitly via branch instructions. Sequential boundary crossing is not supported and
leads to erroneous results.
Note: Changing from the external memory area to the internal RAM/SFR area takes
place within segment 0.
Segments are contiguous blocks of 64 KBytes each. They are referenced via the Code
Segment Pointer CSP for code fetches and via an explicit segment number for data
accesses overriding the standard DPP scheme.
During code fetching, segments are not changed automatically, but rather must be
switched explicitly. The instructions JMPS, CALLS and RETS will do this.
In larger sequential programs, make sure that the highest used code location of a
segment contains an unconditional branch instruction to the respective following
segment to prevent the prefetcher from trying to leave the current segment.
Data Pages are contiguous blocks of 16 KBytes each. They are referenced via the data
page pointers DPP3 … DPP0 and via an explicit data page number for data accesses
overriding the standard DPP scheme. Each DPP register can select one of the possible
1024 data pages. The DPP register which is used for the current access is selected via
the two upper bits of the 16-bit data address. Therefore, subsequent 16-bit data
addresses which cross the 16-KByte data page boundaries will use different data page
pointers, while the physical locations need not be subsequent within memory.



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