C164CL datasheet(23/484 Pages) INFINEON

23 / 484 page

C164CI/C164SI

Derivatives

Architectural Overview

User’s Manual

2-5

V3.1, 2002-02

High Performance Branch-, Call-, and Loop Processing

Due to the high percentage of branching in controller applications, branch instructions

have been optimized to require one extra machine cycle only when a branch is taken.

This is implemented by precalculating the target address while decoding the instruction.

To decrease loop execution overhead, three enhancements have been provided:

• Single cycle branch execution after the first iteration of a loop:

The first solution provides that only one machine cycle is lost during the execution of

the entire loop. In loops which fall through upon completion, no machine cycles are

lost when exiting the loop. No special instructions are required to perform loops, and

loops are automatically detected during execution of branch instructions.

• Detection of the end of a table:

The second loop enhancement avoids the use of two compare instructions embedded

in loops. One simply places the lowest negative number at the end of the specific table

and specifies branching if neither its value nor the compared value have been found.

Otherwise, the loop is terminated if either condition has been met. The terminating

condition can then be tested.

• Compare and Increment or Decrement instructions:

The third loop enhancement provides a more flexible solution than the Decrement and

Skip on Zero instruction found in other microcontrollers. The use of Compare and

Increment or Decrement instructions enables the user to make comparisons to any

value. This allows loop counters to cover any range and is particularly advantageous

in table searching.

The system state information is saved automatically on the internal system stack, thus

avoiding the use of instructions to preserve state upon entry and exit of interrupt or trap

routines. Call instructions push the value of the IP on the system stack, and require the

same execution time as branch instructions. Additionally, instructions have been

provided to support indirect branch and call instructions. This feature supports

implementation of multiple CASE statement branching in assembler macros and high

level languages.

C164CL Datasheet(PDF) 23 Page - Infineon Technologies AG