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C508 Datasheet(PDF) 21 Page - Infineon Technologies AG |
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C508 Datasheet(HTML) 21 Page - Infineon Technologies AG |
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21 / 267 page ![]() C508 Fundamental Structure User’s Manual 2-3 2001-05 2.1 CPU The C508 is efficient both as a controller and as an arithmetic processor. It has extensive facilities for binary and BCD arithmetic and excels in its bit-handling capabilities. Efficient use of program memory results from an instruction set consisting of 44% one-byte, 41% two-byte, and 15% three-byte instructions. With a 10 MHz external crystal (giving a 20 MHz CPU clock), 58% of the instructions execute in 300 ns. For an 8 MHz crystal, the corresponding time is 375 ns. The Central Processing Unit (CPU) of the C508 consists of the instruction decoder, the arithmetic section, and the program control section. Each program instruction is decoded by the instruction decoder. This unit generates the internal signals controlling the functions of the individual units within the CPU. These internal signals have an effect on the source and destination of data transfers and control the Arithmetic/Logic Unit (ALU) processing. The arithmetic section of the processor performs extensive data manipulation and is comprised of the ALU, an A register, a B register, and a Program Status Word (PSW) register. The ALU accepts 8-bit data words from one or two sources and generates an 8-bit result under the control of the instruction decoder. The ALU performs the arithmetic operations: add, substract, multiply, divide, increment, decrement, BDC-decimal-add-adjust and compare, and the logic operations AND, OR, Exclusive OR, complement, and rotate (right, left or swap nibble (left four)). Also included is a Boolean processor performing the bit operations such as set, clear, complement, jump-if-set, jump-if-not-set, jump-if-set- and-clear, and move to/from carry. Between any addressable bit (or its complement) and the carry flag, the ALU can perform the bit operations of logical AND or logical OR with the result returned to the carry flag. The program control section controls the sequence in which the instructions stored in program memory are executed. The 16-bit program counter (PC) holds the address of the next instruction to be executed. The conditional branch logic enables internal and external events to the processor to cause a change in the program execution sequence. Beyond the CPU functionality of the C501/8051 standard microcontroller, the C508 contains eight datapointers. For complex applications with peripherals located in the external data memory space or extended data storage capacity, this proved to be a “bottle neck” for the 8051’s communication to the external world. Programming in high- level languages (PLM51, C51, PASCAL51) especially requires extended RAM capacity as well as fast access to this additional RAM because of the reduced code efficiency of these languages. Accumulator ACC is the symbol for the Accumulator Register. The mnemonics for accumulator- specific instructions, however, refer to the Accumulator simply as A. |
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