DS87C320-ENG datasheet(32/175 Pages) DALLAS

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High-Speed Microcontroller User’s Guide

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REN_0

Bit 4

Receiver Enable.

This bit enable/disables the serial port 0 receiver shift

0 = Serial port 0 reception disabled.

1= Serial port 0 receiver enabled (modes 1, 2, 3). Initiate synchronous reception

(mode 0).

TB8_0

Bit 3

th Transmission Bit State. This bit defines the state of the 9th transmission bit

in serial port 0 modes 2 and 3.

RB8_0

Bit 2

th Received Bit State. This bit identifies that state of the 9th reception bit of

received data in serial port 0 modes 2 and 3. In serial port mode 1, when

SM2_0=0, RB8_0 is the state of the stop bit. RB8_0 is not used in mode 0.

TI_0

Bit 1

Transmitter Interrupt Flag. This bit indicates that data in the serial port 0

buffer has been completely shifted out. In serial port mode 0, TI_0 is set at the

end of the 8

th data bit. In all other modes, this bit is set at the end of the last data

bit. This bit must be manually cleared by software.

RI_0

Bit 0

Receiver Interrupt Flag.

This bit indicates that a byte of data has been

received in the serial port 0 buffer. In serial port mode 0, RI_0 is set at the end of

the 8

th bit. In serial port mode 1, RI_0 is set after the last sample of the incoming

stop bit subject to the state of SM2_0. In modes 2 and 3, RI_0 is set after the last

sample of RB8_0. This bit must be manually cleared by software.

Serial Data Buffer 0 (SBUF0)

SFR 99h SBUF0.7

SBUF0.6

SBUF0.5

SBUF0.4

SBUF0.3

SBUF0.2

SBUF0.1

SBUF0.0

RW-0

R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset

SBUF0.7-0

Bits 7-0

Serial Data Buffer 0. Data for serial port 0 is read from or written to this

location. The serial transmit and receive buffers are separate registers, but both

are addressed at this location.

Port 2 (P2)

SFR A0h

P2.7

P2.6

P2.5

P2.4

P2.3

P2.2

P2.1

P2.0

RW-1

R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset

P2.7-0

Bits 7-0

Port 2. This port functions as an address bus during external memory access,

and as a general purpose I/O port on devices which incorporate internal program

memory. During external memory cycles, this port will contain the MSB of the

address. The Port 2 latch does not control general purpose I/O pins on the

DS80C310 and DS80C320, but is still used to hold the address MSB during

DS87C320-ENG Datasheet(PDF) 32 Page - Dallas Semiconductor

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