TDA7502 datasheet(7/25 Pages) STMICROELECTRONICS

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TDA7502

Block diagram and PIN description

7/25

LRCKR

I/O

–

Left-right clock for SAI Receiver. Master or slave.

SCKR

I/O

–

SAI receive bit clock. Master or slave.

VDD4

–

3.3V supply.

GND4

–

Ground.

SDO0

High

SDO0 is a stereo digital audio data output pin channel 0.

SDO1

High

SDO1 is a stereo digital audio data output pin channel 1.

SDO2

High

SDO2 is a stereo digital audio data pin channel 2.

VDD5

–

3.3V supply.

GND5

–

Ground.

LRCKT

I/O

–

SAI transmit left/right clock. Master or slave.

SCKT

I/O

–

SAI transmit bit clock. Master or slave.

SCL

I/O

–

Clock line for I2C bus. Schmitt trigger input.

SDA

I/O

–

Data line for I2C bus. Schmitt trigger input.

SCK

–

Bit clock for SPI control interface.

–

Slave select input pin for SPI control interface.

MOSI

I/O

–

Serial data output for SPI type serial port when in SPI

master mode and serial data input when in SPI slave

mode.

MISO

I/O

–

Serial data input for SPI style serial port when in SPI

master mode and serial data output when in SPI slave

mode.

VDD6

–

3.3V supply.

GND6

–

Ground.

GPIO3

I/O

–

This pin is dedicated as general I/O.

GPIO4

I/O

–

This pin is dedicated as general I/O.

GPIO5

I/O

–

This pin is dedicated as general I/O.

XTI and XTO are not 5V tolerant

Table 1.

Pin description (continued)

Name

Type

Reset

status

Function

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