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ORSPI4 Datasheet(PDF) 144 Page - Lattice Semiconductor |
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ORSPI4 Datasheet(HTML) 144 Page - Lattice Semiconductor |
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144 / 263 page  Lattice Semiconductor ORCA ORSPI4 Data Sheet 144 Figure 80. F_MC_RI[31:0] Clock: F_MC_RCLK Figure 81. F_MC_WIFIFO_WE, F_MC_WDFIFO_WE Clock: F_MC_WCLK Q 3.5/0.5 ns 1.5/0.5 ns FIFO D 2.4/ 0.75 ns FPGA Embedded Core C 1.35/ 0.85 ns Setup = 1.4 ns Hold = 0.4 ns NOTE: Delays represent average max/min values, not absolute values Delay Delay Actual delay values are used by ispLEVER Clock Buffer Delay Relative to Data Setup = 1.4 ns Hold = 0.4 ns Q 3.5/0.5 ns 1.5/0.5 ns FIFO D 2.7/ 0.73 ns FPGA Embedded Core C 1.7/ 0.75 ns Setup= 2.8 ns Hold = 0.37 ns Delay Delay NOTE: Delays represent average max/min values, not absolute values Actual delay values are used by ispLEVER Clock Buffer Delay Relative to Data |
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