LM3S600 datasheet(13/378 Pages) BOOKHAM

13 / 378 page

Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 197

Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 198

Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 199

Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 200

Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 201

Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 202

Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 203

Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 204

Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 205

Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 206

Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 207

Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 208

Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 209

Watchdog Peripheral Identification 2 (WDTPeriphID2), offset 0xFE8 ................................. 210

Watchdog Peripheral Identification 3 (WDTPeriphID3), offset 0xFEC ................................. 211

Watchdog PrimeCell Identification 0 (WDTPCellID0), offset 0xFF0 .................................... 212

Watchdog PrimeCell Identification 1 (WDTPCellID1), offset 0xFF4 .................................... 213

Watchdog PrimeCell Identification 2 (WDTPCellID2), offset 0xFF8 .................................... 214

Watchdog PrimeCell Identification 3 (WDTPCellID3 ), offset 0xFFC .................................. 215

Universal Asynchronous Receivers/Transmitters (UARTs) ..................................................... 216

UART Data (UARTDR), offset 0x000 ............................................................................... 223

UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 ........................... 225

UART Flag (UARTFR), offset 0x018 ................................................................................ 227

UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ............................................ 229

UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ....................................... 230

UART Line Control (UARTLCRH), offset 0x02C ............................................................... 231

UART Control (UARTCTL), offset 0x030 ......................................................................... 233

UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ........................................... 234

UART Interrupt Mask (UARTIM), offset 0x038 ................................................................. 236

UART Raw Interrupt Status (UARTRIS), offset 0x03C ...................................................... 238

UART Masked Interrupt Status (UARTMIS), offset 0x040 ................................................. 239

UART Interrupt Clear (UARTICR), offset 0x044 ............................................................... 240

UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0 ..................................... 242

UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4 ..................................... 243

UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8 ..................................... 244

UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ..................................... 245

UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0 ...................................... 246

UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4 ...................................... 247

UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8 ...................................... 248

UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ..................................... 249

UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0 ........................................ 250

UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4 ........................................ 251

UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8 ........................................ 252

UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ........................................ 253

Synchronous Serial Interface (SSI) ............................................................................................ 254

SSI Control 0 (SSICR0), offset 0x000 .............................................................................. 266

SSI Control 1 (SSICR1), offset 0x004 .............................................................................. 268

SSI Data (SSIDR), offset 0x008 ...................................................................................... 270

October 01, 2007

Preliminary

LM3S600 Microcontroller

LM3S600 Datasheet(PDF) 13 Page - Bookham, Inc.

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