HD4048412FS datasheet(91/127 Pages) RENESAS

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HD404849 Series

Bit

Initial value

Read/Write

Bit name

—

Not used

—

Not used

SMRB0

Undefined

SMRB1

SMRB0

Transmit clock division ratio

Prescaler output divided by 2

Prescaler output divided by 4

Serial mode register B (SMRB: $028)

SMRB1

Output level control in idle states

Low level

High level

Figure 71 Serial Mode Register B (SMRB)

Serial Data Register (SRL: $006, SRU: $007): The serial data register configuration is shown in figures

72 and 73. This register has the following functions.

• Transmission data write and shift

• Receive data shift and read

Writing data in this register is output from the SO pin, LSB first, synchronously with the falling edge of the

transmit clock; data is input, LSB first, through the SI pin at the rising edge of the transmit clock.

Input/output timing is shown in figure 74.

Data cannot be read or written during serial data transfer. If a read/write occurs during transfer, the

accuracy of the resultant data cannot be guaranteed.

Bit

Initial value

Read/Write

Bit name

Undefined

R/W

SR3

Undefined

R/W

SR2

Undefined

R/W

SR0

Undefined

R/W

SR1

Serial data register (lower digit) (SRL: $006)

Figure 72 Serial Data Register (SRL)

HD4048412FS Datasheet(PDF) 91 Page - Renesas Technology Corp

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