R8C2C datasheet(152/615 Pages) RENESAS

152 / 615 page

R8C/2C Group, R8C/2D Group

12. Interrupts

Rev.2.00

Dec 05, 2007

Page 131 of 585

REJ09B0339-0200

Figure 12.4

Registers TRCIC, TRD0IC, TRD1IC, SSUIC, and IICIC

Interrupt Control Register(1)

Address

After Reset

0047h

XXXXX000b

0048h

XXXXX000b

0049h

XXXXX000b

004Fh

XXXXX000b

Bit Symbol

Function

NOTES:

0 : Requests no interrupt

1 : Requests interrupt

—

(b7-b4)

—

ILVL0

b2 b1 b0

0 0 0 : Level 0 (interrupt disable)

0 0 1 : Level 1

0 1 0 : Level 2

0 1 1 : Level 3

1 0 0 : Level 4

1 0 1 : Level 5

1 1 0 : Level 6

1 1 1 : Level 7

ILVL1

ILVL2

The IICSEL bit in the PMR register sw itches functions.

Rew rite the interrupt control register w hen the interrupt request w hich is applicable for the register is not generated.

Refer to 12.6.5 Changing Interrupt Control Register Contents.

b7 b6 b5 b4 b3 b2 b1 b0

Bit Name

Interrupt priority level select bits

Interrupt request bit

Nothing is assigned. If necessary, set to 0.

When read, the content is undefined.

Symbol

TRD1IC

TRD0IC

SSUIC/IICIC(2)

TRCIC

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