M32C83T datasheet(129/527 Pages) RENESAS

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Page 106

10. Interrupts

)

(

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10.8 NMI Interrupt

______

The NMI interrupt occurs when the signal applied to the P85/NMI pin changes from an "H" signal to an "L"

______

signal. The NMI interrupt is a non-maskable interrupt. Although the P85/NMI pin is used as the NMI inter-

rupt input pin, the P8_5 bit in the P85 register indicates input level for this pin.

NOTES:

______

When the NMI interrupt is not used, connect (pull-up) the NMI pin to Vcc via a resistor. Because the NMI

interrupt cannot be ignored, the pin must be connected.

10.9 Key Input Interrupt

Key input interrupt request is generated when one of the signals applied to the P104 to P107 pins in input

mode is on the falling edge. The key input interrupt can be also used as key-on wake-up function to exit wait

or stop mode. To use the key input interrupt, do not use P104 to P107 as A/D input ports. Figure 10.11

shows a block diagram of the key input interrupt. When an "L" signal is applied to any pins in input mode,

signals applied to other pins are not detected as a request signal for an interrupt.

When the PSC_7 bit in the PSC register(1) is set to "1" (key input interrupt disabled), no key input interrupt

occurs regardless of interrupt control register settings. When the PSC_7 bit is set to "1", no input from a

port pin is available even when in input mode.

NOTES:

1. Refer to 24. Programmable I/O Ports for details on the PSC register.

Figure 10.11 Key Input Interrupt

Interrupt Control

Circuit

KUPIC Register

Key Input Interrupt

Request

P107/KI3

P106/KI2

P105/KI1

P104/KI0

PU31 bit in PUR3 register

PD10_7 bit

Pull-up

transistor

PD10_7 bit

PD10_6 bit

PD10_5 bit

PD10_4 bit

Pull-up

transistor

Pull-up

transistor

Pull-up

transistor

PSC_7 bit

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