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M32C83T Datasheet(PDF) 157 Page - Renesas Technology Corp |
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M32C83T Datasheet(HTML) 157 Page - Renesas Technology Corp |
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157 / 527 page ![]() Page 134 8 8 4 f o 6 0 0 2 , 1 3 . n a J 1 3 . 1 . v e R 1 3 1 0 - 4 3 0 0 B 9 0 J E R 14. Timer ) T 3 8 / C 2 3 M , 3 8 / C 2 3 M ( p u o r G 3 8 / C 2 3 M TB0IN TB1IN TB2IN Timer B0 f1 f8 f2n fC32 Timer B0 interrupt Noise filter Timer B2 overflow or underflow (to a count source of the timer A) TB3IN TB4IN TB5IN Timer B3 interrupt Timer B1 interrupt Timer B2 interrupt Timer B4 interrupt Timer B5 interrupt 1/8 f1 f8 1/2n Main clock, PLL clock or On-chip clock CST (Note 1) 00 01 10 11 TCK1 to TCK0 Timer B1 00 01 10 11 TCK1 to TCK0 Noise filter Timer B2 00 01 10 11 TCK1 to TCK0 Noise filter Timer B3 00 01 10 11 TCK1 to TCK0 Noise filter 00 01 10 11 TCK1 to TCK0 Timer B4 Noise filter 00 01 10 11 TCK1 to TCK0 Timer B5 Noise filter 01:Event counter mode 00: Timer mode 10: Pulse width measurement mode TCK1 1 0 TMOD1 to TMOD0 01:Event counter mode 00: Timer mode 10: Pulse width measurement mode TCK1 1 0 01:Event counter mode 00: Timer mode 10: Pulse width measurement mode TCK1 1 0 01:Event counter mode 00: Timer mode 10: Pulse width measurement mode TCK1 1 0 01:Event counter mode 00: Timer mode 10: Pulse width measurement mode TCK1 1 0 01:Event counter mode 00: Timer mode 10: Pulse width measurement mode TCK1 1 0 CST : Bit in TCSPR register TCK1 to TCK0, TMOD1 to TMOD0 : Bits in TBiMR register (i=0 to 5) NOTES: 1. The CNT3 to CNT0 bits in the TCSPR register select no division (n=0) or divide-by-2n (n=1 to 15). f2n TMOD1 to TMOD0 TMOD1 to TMOD0 TMOD1 to TMOD0 TMOD1 to TMOD0 TMOD1 to TMOD0 1/32 fC32 XCIN Reset Clock prescaler Set the CPSR bit in the CPSRF register to "1" Figure 14.2 Timer B Configuration |
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