| Electronic Components Datasheet Search |
|
M32C83T Datasheet(PDF) 310 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
M32C83T Datasheet(HTML) 310 Page - Renesas Technology Corp |
|
310 / 527 page ![]() Page 287 8 8 4 f o 6 0 0 2 , 1 3 . n a J 1 3 . 1 . v e R 1 3 1 0 - 4 3 0 0 B 9 0 J E R 21. Intelligent I/O (Waveform Generation Function) ) T 3 8 / C 2 3 M , 3 8 / C 2 3 M ( p u o r G 3 8 / C 2 3 M 21.3.6 Parallel Real-Time Port Output Mode (Group 2 and 3) The OUTCij pin outputs the value set by the GiRTP register in one-byte units when the value of the base timer matches that of the GiPOj register (i=2 to 3, j=0 to 7). Table 21.15 lists specifications of the parallel RTP output mode. Figure 21.30 shows a block diagram of the parallel RTP output function. Figure 21.31 shows an example of the parallel RTP output mode operation. (See Figure 21.7 for the G2BCR1 register and Figure 21.8 for the G3BCR1 register.) Table 21.15 Parallel RTP Output Mode Specifications Item Specification Waveform Output Start Condition The IFEj bit in the GiFE register (i=2 to 3, j=0 to 7) is set to "1" (channel j function enabled) Waveform Output Stop Condition The IFEj bit is set to "0" (channel j function disabled) Interrupt Request The POijR bit in the interrupt request register is set to "1" when value of the base timer matches that of the GiPOj register (000016 to FFFF16(1)). (See Figure 10.14.) OUTCij Pin RTP output Selectable Function • Default value set function: Set starting waveform output level • Inverse output function: Waveform output level is inversed and output from the OUTCij pin NOTES: 1. Set the GiPO0 register to 000116 to FFFD16 when setting the base timer to "000016" (the RST1 bit in the GiBCR1 register is set to "1", and the RST0 and RST2 bits are set to "0") while the values in the base timer and the GiPO0 register match DQ T RTP0 RTP1 RTP2 RTP3 RTP4 RTP5 RTP6 RTP7 DQ T DQ T DQ T DQ T DQ T DQ T DQ T Real-time Port Output GiRTP register GiPO0 register Base Timer GiPO1 register GiPO2 register GiPO3 register GiPO4 register GiPO5 register GiPO6 register GiPO7 register OUTCi0 OUTCi1 OUTCi2 OUTCi3 OUTCi4 OUTCi5 OUTCi6 OUTCi7 i=2 to 3 Figure 21.30 Parallel RTP Output Function Block Diagram |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |