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H83802 Datasheet(PDF) 55 Page - Renesas Technology Corp |
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H83802 Datasheet(HTML) 55 Page - Renesas Technology Corp |
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55 / 555 page ![]() Section 1 Overview Rev. 6.00 Mar 15, 2005 page 5 of 502 REJ09B0024-0600 H8/300L CPU RAM ROM Asynchronous event counter (AEC) WDT Vss = AVss Vcc RES TEST PA3/COM4 PA2/COM3 PA1/COM2 PA0/COM1 P80/SEG25 P77/SEG24 P76/SEG23 P75/SEG22 P74/SEG21 P73/SEG20 P72/SEG19 P71/SEG18 P70/SEG17 P60/SEG9 P61/SEG10 P62/SEG11 P63/SEG12 P64/SEG13 P65/SEG14 P66/SEG15 P67/SEG16 P40/SCK32 P41/RXD32 P42/TXD32 P43/ IRQ0 OSC1 OSC2 x1 x2 P31/TMOFL P32/TMOFH P33 P34 P35 P36/AEVH P37/AEVL P50/ WKP0/SEG1 P51/ WKP1/SEG2 P52/ WKP2/SEG3 P53/ WKP3/SEG4 P54/ WKP4/SEG5 P55/ WKP5/SEG6 P56/ WKP6/SEG7 P57/ WKP7/SEG8 PB3/AN3/ IRQ1 PB2/AN2 PB1/AN1 PB0/AN0 V1 V2 V3 AVcc Note: When the on-chip emulator is used, pins P95, P33, P34, and P35 are unavailable to the user because they are used exclusively by the on-chip emulator. IRQAEC Vss P95 P94 P93 P92 P91/PWM2 P90/PWM1 Subclock oscillator System clock oscillator Timer A Timer F SCI3 10-bit PWM1 10-bit PWM2 LCD controller/driver 10-bit A/D converter Figure 1.2 Internal Block Diagram of H8/38004 Group |
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