H83802 datasheet(22/555 Pages) RENESAS

22 / 555 page

Rev. 6.00 Mar 15, 2005 page xxii of l

Item

Page

Revisions (See Manual for Details)

9.5.4 Operating States

of Watchdog Timer

256

Description amended

Tables 9.8(1) and 9.8(2) summarize the operating states of the

watchdog timer for the H8/38004, H8/38002S Group and

H8/38104 Group, respectively.

Table 9.8(1) Operating

States of Watchdog

Timer (H8/38004,

H8/38002S Group)

Title amended

10.3.8 Bit Rate

269

Description amended

The values are shown in table 10.5

N =

32 2 2n B

– 1

Error (%) =

100

B (bit rate obtained from n, N, ) – R (bit rate in left-hand column in table 10.2)

R (bit rate in left-hand column in table 10.2)

Legend:

Bit rate (bit/s)

BRR setting for baud rate generator (0

255)

φ:

Operating frequency (Hz)

Baud rate generator input clock number (n = 0, 2, or 3)

(The relation between n and the clock is shown in table 10.3.)

≤≤

••

•

Table 10.2 Examples

of BRR Settings for

Various Bit Rates

(Asynchronous Mode)

(2)

271

Table amended

10 MHz

Bit Rate

(bit/s)

Error

(%)

110

0.88

150

–1.36

200

1.73

250

–2.34

300

1.73

600

1.73

1200

1.73

2400

1.73

4800

1.73

9600

1.73

19200

1.73

31250

38400

1.73

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