HD64F2633 datasheet(58/1487 Pages) RENESAS

58 / 1487 page

Rev. 5.00 Mar 28, 2005 page lviii of lxii

22.6

On-Board Programming Modes........................................................................................ 939

22.6.1 Boot Mode ........................................................................................................... 940

22.6.2 User Program Mode............................................................................................. 944

22.7

Programming/Erasing Flash Memory............................................................................... 946

22.7.1 Program Mode ..................................................................................................... 947

22.7.2 Program-Verify Mode ......................................................................................... 948

22.7.3 Erase Mode .......................................................................................................... 952

22.7.4 Erase-Verify Mode .............................................................................................. 952

22.8

Protection.......................................................................................................................... 954

22.8.1 Hardware Protection ............................................................................................ 954

22.8.2 Software Protection ............................................................................................. 955

22.8.3 Error Protection ................................................................................................... 956

22.9

Flash Memory Emulation in RAM ................................................................................... 958

22.10 Interrupt Handling when Programming/Erasing Flash Memory....................................... 960

22.11 Flash Memory Programmer Mode.................................................................................... 960

22.11.1 Socket Adapter and Memory Map....................................................................... 961

22.11.2 Programmer Mode Operation .............................................................................. 962

22.11.3 Memory Read Mode ............................................................................................ 963

22.11.4 Auto-Program Mode ............................................................................................ 967

22.11.5 Auto-Erase Mode................................................................................................. 969

22.11.6 Status Read Mode ................................................................................................ 971

22.11.7 Status Polling ....................................................................................................... 972

22.11.8 Programmer Mode Transition Time .................................................................... 972

22.11.9 Notes on Memory Programming ......................................................................... 973

22.12 Flash Memory and Power-Down States............................................................................ 974

22.12.1 Note on Power-Down States................................................................................ 974

22.13 Flash Memory Programming and Erasing Precautions..................................................... 975

22.14 Note on Switching from F-ZTAT Version to Mask ROM Version .................................. 980

Section 23A Clock Pulse Generator

(H8S/2633, H8S/2632, H8S/2631, H8S/2633F) ............................... 981

23A.1

Overview ....................................................................................................................... 981

23A.1.1

Block Diagram.............................................................................................. 981

23A.1.2

23A.2

Register Descriptions .................................................................................................... 982

23A.2.1

System Clock Control Register (SCKCR).................................................... 982

23A.2.2

Low-Power Control Register (LPWRCR) .................................................... 983

23A.3

Oscillator ....................................................................................................................... 984

23A.3.1

Connecting a Crystal Resonator ................................................................... 984

23A.3.2

External Clock Input..................................................................................... 987

HD64F2633 Datasheet(PDF) 58 Page - Renesas Technology Corp

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