HD64F36022G datasheet(77/384 Pages) RENESAS

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Section 3 Exception Handling

Rev. 4.00 Sep. 23, 2005 Page 51 of 354

REJ09B0025-0400

3.2.5

Wakeup Interrupt Flag Register (IWPR)

IWPR is a status flag register for

WKP5 to WKP0 interrupt requests.

Bit

Bit Name

Initial

Value

R/W

Description

7, 6



All 1



Reserved

These bits are always read as 1.

IWPF5

R/W

WKP5 Interrupt Request Flag

[Setting condition]

When

WKP5 pin is designated for interrupt input and the

designated signal edge is detected.

[Clearing condition]

When IWPF5 is cleared by writing 0.

IWPF4

R/W

WKP4 Interrupt Request Flag

[Setting condition]

When

WKP4 pin is designated for interrupt input and the

designated signal edge is detected.

[Clearing condition]

When IWPF4 is cleared by writing 0.

IWPF3

R/W

WKP3 Interrupt Request Flag

[Setting condition]

When

WKP3 pin is designated for interrupt input and the

designated signal edge is detected.

[Clearing condition]

When IWPF3 is cleared by writing 0.

IWPF2

R/W

WKP2 Interrupt Request Flag

[Setting condition]

When

WKP2 pin is designated for interrupt input and the

designated signal edge is detected.

[Clearing condition]

When IWPF2 is cleared by writing 0.

IWPF1

R/W

WKP1 Interrupt Request Flag

[Setting condition]

When

WKP1 pin is designated for interrupt input and the

designated signal edge is detected.

[Clearing condition]

When IWPF1 is cleared by writing 0.

HD64F36022G Datasheet(PDF) 77 Page - Renesas Technology Corp

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