Electronic Components Datasheet Search
  English  ▼

X  

R4S2426 Datasheet(PDF) 97 Page - Renesas Technology Corp

Part # R4S2426
Description  16-Bit Single-Chip Microcomputer H8S Family / H8S/2400 Series
PDF  1302 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R4S2426 Datasheet(HTML) 97 Page - Renesas Technology Corp

Back Button R4S2426 Datasheet HTML 93Page - Renesas Technology Corp R4S2426 Datasheet HTML 94Page - Renesas Technology Corp R4S2426 Datasheet HTML 95Page - Renesas Technology Corp R4S2426 Datasheet HTML 96Page - Renesas Technology Corp R4S2426 Datasheet HTML 97Page - Renesas Technology Corp R4S2426 Datasheet HTML 98Page - Renesas Technology Corp R4S2426 Datasheet HTML 99Page - Renesas Technology Corp R4S2426 Datasheet HTML 100Page - Renesas Technology Corp R4S2426 Datasheet HTML 101Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 97 / 1302 page
background image
Section 2 CPU
Rev. 1.00 Sep. 19, 2008 Page 69 of 1270
REJ09B0466-0100
op
op
rn
rm
NOP, RTS, etc.
ADD.B Rn, Rm, etc.
MOV.B @(d:16, Rn), Rm, etc.
rn
rm
op
EA (disp)
op
cc
EA (disp)
BRA d:16, etc.
(1) Operation field only
(2) Operation field and register fields
(3) Operation field, register fields, and effective address extension
(4) Operation field, effective address extension, and condition field
Figure 2.11 Instruction Formats (Examples)
2.7
Addressing Modes and Effective Address Calculation
The H8S/2600 CPU supports the eight addressing modes listed in table 2.11. The usable address
modes are different in each instruction.
Arithmetic and logic instructions can use the register direct and immediate modes. Data transfer
instructions can use all addressing modes except program-counter relative and memory indirect.
Bit manipulation instructions use register direct, register indirect, or absolute addressing mode to
specify an operand, and register direct (BSET, BCLR, BNOT, and BTST instructions) or
immediate (3-bit) addressing mode to specify a bit number in the operand.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com