SH7055SF datasheet(49/1002 Pages) RENESAS

49 / 1002 page

Rev.2.0, 07/03, page 11 of 960

Table 1.2

Pin Functions (cont)

Type

Symbol

Pin No.

I/O

Name

Function

PLLV

Input

PLL power

supply

On-chip PLL oscillator power

supply.

For power supply connection,

see section 5, Clock Pulse

Generator (CPG).

PLLV

Input

PLL ground

On-chip PLL oscillator ground.

For power supply connection,

see section 5, Clock Pulse

Generator (CPG).

PLLCAP

Input

PLL

capacitance

On-chip PLL oscillator

external capacitance

connection pin.

For external capacitance

connection, see section 5,

Clock Pulse Generator (CPG).

EXTAL

Input

External clock

For connection to a crystal

resonator. An external clock

source can also be connected

to the EXTAL pin.

XTAL

Input

Crystal

For connection to a crystal

resonator.

Clock

Output

System clock

Supplies the system clock to

peripheral devices.

RES

Input

Power-on

reset

Executes a power-on reset

when driven low.

WDTOVF

124

Output

Watchdog

timer overflow

WDT overflow output signal.

BREQ

Input

Bus request

Driven low when an external

device requests the bus.

System control

BACK

Output

Bus request

acknowledge

Indicates that the bus has

been granted to an external

device. The device that output

the

BREQ signal recognizes

that the bus has been

acquired when it receives the

BACK signal.

SH7055SF Datasheet(PDF) 49 Page - Renesas Technology Corp

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