7540 datasheet(109/366 Pages) RENESAS

109 / 366 page

2-33

REJ09B0018-0200Z

Rev.2.00

Jun 21, 2004

7540 Group

APPLICATION

2.2 Timer A

Fig. 2.2.25 Example of control procedure (1)

“1F16”

“4E16”

1 1

CLI

RESET

Timer A division

ratio (fixed)

Timer A

setting value

SEI

CLD

CLT

CPUM(Address 3B16)

← 10000X002

Wait until f(XIN) oscillation is stabilized (Note 1)

CPUM(Address 3B16)

← 00000X002

1 1

CNTR1 interrupt occurs at rising edge and falling

edge of waveform which is input to P00/CNTR1 pin

Timer A interrupt occurs at timer A

underflow (at every 50 ms)

A ringing pulse exists ?

(Ringer flag = “1”?)

Processing when a ringing pulse exists

Main processing

Set timer A mode register

TAM(Address 1D16)

Timer A count start

TAM(Address 1D16)

Pulse width HL continuously

measurement mode

Timer A count stop

Set timer A mode register

Set port P00 to the input mode.

PULL(Address 1616)

P00 pull-up control bit

0: Pull-up Off

1: Pull-up On

Set pull-up control register

INTEDGE(Address 3A16)

Key-on wakeup disabled

CNTR1 interrupt processing

Timer A interrupt processing

Set “0” to the timer A interrupt enable bit.

(Timer A interrupt disabled)

Set “0” to the CNTR1 interrupt enable bit.

(CNTR1 interrupt disabled)

Initialization

X: This bit is not used here. Set it to “0” or “1” arbitrary.

Notes 1: For the concrete time, ask the oscillator manufacture.

2: When setting the value to timer A, set in order of low-order byte

and high-order byte following.

3: 50 ms = 1/6.4 MHz ✕ 16 ✕ (4E1F16 + 1)

Timer A (low-order) (Address 1E16)

Set value to timer A (Notes 2, 3)

Timer A (high-order) (Address 1F16)

Set interrupt edge selection register

Set “1” to the CNTR1 interrupt enable bit.

(CNTR1 interrupt enabled)

Set “1” to the timer A interrupt enable bit.

(Timer A interrupt enabled)

Set “0” to the CNTR1 interrupt request bit.

Set “0” to the timer A interrupt request bit.

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