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7540 Datasheet(PDF) 111 Page - Renesas Technology Corp

Part # 7540
Description  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 740 SERIES
PDF  366 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7540 Datasheet(HTML) 111 Page - Renesas Technology Corp

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2-35
REJ09B0018-0200Z
Rev.2.00
Jun 21, 2004
7540 Group
APPLICATION
2.2 Timer A
2.2.7 Notes on timer A
Notes on using timer A are described below.
(1) Common to all modes
➀ When reading timer A (high-order) (TAH) and timer A (low-order) (TAL), the contents of timer A
is read out. Read both registers in order of TAH and TAL following, certainly.
TAH and TAL keep the values until they are read out.
Also, do not write to them during read. In this case, unexpected operation may occur.
➁ When writing data to TAL and TAH when timer A is operating or stopped, the data are set to timer
A and timer A latch simultaneously. Write both registers in order of TAL and TAH following,
certainly.
Also, do not read them during write. In this case, unexpected operation may occur.
(2) Period measurement mode, event counter mode, and pulse width HL continuously measurement mode
➀ In order to use CNTR1 pin, set “0” to bit 0 of the port P0 direction register (input mode).
➁ In order to use CNTR1 pin, set “1” to bit 7 of the interrupt edge selection register to disable the
P00 key-on wakeup function.
➂ CNTR1 interrupt active edge depends on the CNTR1 active edge switch bit. When this bit is “0”,
the CNTR1 interrupt request bit is set to “1” at the falling edge of the CNTR1 pin input signal. When
this bit is “1”, the CNTR1 interrupt request bit is set to “1” at the rising edge of the CNTR1 pin input
signal.
However, in the pulse width HL continuously measurement mode, CNTR1 interrupt request is
generated at both rising and falling edges of CNTR1 pin input signal regardless of the setting of
CNTR1 active edge switch bit.



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