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7540 Datasheet(PDF) 121 Page - Renesas Technology Corp |
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7540 Datasheet(HTML) 121 Page - Renesas Technology Corp |
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121 / 366 page  2-45 REJ09B0018-0200Z Rev.2.00 Jun 21, 2004 7540 Group APPLICATION 2.4 Timer X Fig. 2.4.8 Structure of Interrupt request register 1 Fig. 2.4.9 Structure of Interrupt control register 1 Interrupt request register 1 b7 b6 b5 b4 b3 b2 b1 b0 B Function At reset RW 0 1 2 3 4 5 6 7 Name 0 0 0 0 0 0 0 0 Interrupt request register 1 (IREQ1) [Address : 3C 16] Serial I/O1 receive interrupt request bit Serial I/O1 transmit interrupt request bit 0 : No interrupt request issued 1 : Interrupt request issued CNTR0 interrupt request bit CNTR1 interrupt request bit ✽: These bits can be cleared to “0” by program, but cannot be set to “1”. 0 : No interrupt request issued 1 : Interrupt request issued INT0 interrupt request bit INT1 interrupt request bit 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued Key-on wake up interrupt request bit 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued ✽ ✽ ✽ ✽ ✽ ✽ ✽ Timer X interrupt request bit 0 : No interrupt request issued 1 : Interrupt request issued ✽ Interrupt control register 1 b7 b6 b5 b4 b3 b2 b1 b0 B Function At reset RW 0 1 2 3 4 5 6 7 Name 0 0 0 0 0 0 0 0 Interrupt control register 1 (ICON1) [Address : 3E 16] Serial I/O1 receive interrupt enable bit Serial I/O1 transmit interrupt enable bit 0 : Interrupt disabled 1 : Interrupt enabled CNTR0 interrupt enable bit CNTR1 interrupt enable bit INT0 interrupt enable bit INT1 interrupt enable bit Key-on wake up interrupt enable bit 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled Timer X interrupt enable bit 0 : Interrupt disabled 1 : Interrupt enabled |
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