H83069RF datasheet(112/1003 Pages) RENESAS

112 / 1003 page

Rev. 5.0, 09/04, page 90 of 978

Bit 3—Priority Level A3 (IPRA3): Selects the priority level of WDT, DRAM interface, and A/D

converter interrupt requests.

Bit 3

IPRA3

Description

WDT, DRAM interface, and A/D converter interrupt requests have priority level 0

(low priority)

(Initial value)

WDT, DRAM interface, and A/D converter interrupt requests have priority level 1

(high priority)

Bit 2—Priority Level A2 (IPRA2): Selects the priority level of 16-bit timer channel 0 interrupt

requests.

Bit 2

IPRA2

Description

16-bit timer channel 0 interrupt requests have priority level 0 (low priority) (Initial value)

16-bit timer channel 0 interrupt requests have priority level 1 (high priority)

Bit 1—Priority Level A1 (IPRA1): Selects the priority level of 16-bit timer channel 1 interrupt

requests.

Bit 1

IPRA1

Description

16-bit timer channel 1 interrupt requests have priority level 0 (low priority) (Initial value)

16-bit timer channel 1 interrupt requests have priority level 1 (high priority)

Bit 0—Priority Level A0 (IPRA0): Selects the priority level of 16-bit timer channel 2 interrupt

requests.

Bit 0

IPRA0

Description

16-bit timer channel 2 interrupt requests have priority level 0 (low priority) (Initial value)

16-bit timer channel 2 interrupt requests have priority level 1 (high priority)

H83069RF Datasheet(PDF) 112 Page - Renesas Technology Corp