H83069RF datasheet(23/1003 Pages) RENESAS

23 / 1003 page

Rev. 5.0, 09/04, page 1 of 978

Section 1 Overview

1.1

Overview

The H8/3069R is a series of microcontrollers (MCUs) that integrate system supporting functions

together with an H8/300H CPU core having an original Renesas Technology architecture.

The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a

concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address

space. Its instruction set is upward-compatible at the object-code level with the H8/300 CPU,

enabling easy porting of software from the H8/300 Series.

The on-chip system supporting functions include ROM, RAM, a 16-bit timer, an 8-bit timer, a

programmable timing pattern controller (TPC), a watchdog timer (WDT), a serial communication

interface (SCI), an A/D converter, a D/A converter, I/O ports, a direct memory access controller

(DMAC), and other facilities.

The H8/3069R has 512 kbytes of flash memory and 16 kbytes of RAM.

Six MCU operating modes offer a choice of bus width and address space size. The modes (modes

1 to 5, 7) include one single-chip mode and five expanded modes.

The H8/3069R includes an F-ZTAT™* version with on-chip flash memory that can be

programmed on-board. This version enables users to respond quickly and flexibly to changing

application specifications, growing production volumes, and other conditions.

Table 1.1 summarizes the features of the H8/3069R.

Note: * F-ZTAT (Flexible ZTAT) is a trademark of Renesas Technology Corp.

H83069RF Datasheet(PDF) 23 Page - Renesas Technology Corp