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Document Number: 91062

4

S-81352-Rev. A, 16-Jun-08

IRF830AS, IRF830AL, SiHF830AS, SiHF830AL

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

1

10

100

1000

10000

1

1 0

100

1000

DS

V

, D ra in -to -S o u rce V olta g e(V)

A

V

= 0V,

f = 1M Hz

C

= C

+ C

,

C

SHO RT E D

C

= C

C

= C

+ C

GS

iss

g s

g d

ds

rs s

g d

o s s

d s

g d

0

4

8

12

16

20

24

0

4

8

12

16

20

Q , Total Gate Charge (nC)

G

FOR TEST CIRCUIT

SEE FIGURE

I =

D

13

5.0A

V

= 100V

DS

V

= 250V

DS

V

= 400V

DS

0.1

1

10

100

0.2

0.4

0.6

0.8

1.0

1.2

V

,Source-to-Drain Voltage (V)

SD

V

= 0 V

GS

T = 25 C

J

°

T = 150 C

J

°

0.1

1

10

100

10

100

1000

10000

OPERATION IN THIS AREA LIMITED

Single Pulse

T

T

= 150 C

= 25 C

°

°

J

C

V

, Drain-to-Source Voltage (V)

DS

10us

100us

1ms

10ms