TLV320AIC3107 datasheet(9/94 Pages) TI

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TLV320AIC3107

www.ti.com ....................................................................................................................................... SLOS545A – NOVEMBER 2008 – REVISED DECEMBER 2008

ELECTRICAL CHARACTERISTICS (continued)

At 25°C, AVDD_DAC, DRVDD, SPVDD = 5 V, IOVDD = 3.3 V, DVDD = 1.8 V, Fs = 48-kHz, 16-bit audio data (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SPEAKER AMPLIFIER OUTPUT, LOAD = 8

Ω

1 kHz, 0dB full-scale input signal,

Output volume control for left line output = 0 dB, for

Full-scale output voltage

2.5

Vrms

class-D = 0 dB

Output common mode setting = 1.35 V, Fs = 48 kHz

1 kHz, 0dB full-scale input signal,

Output volume control for left line output = -4.5 dB, for

Output voltage

2.875

Vrms

class-D = 6 dB

Output common mode setting = 1.35 V, Fs = 48 kHz

Idle Channel Noise

No input signal, output gain control = 0 dB

-92

1 kHz,–60 dB full-scale input signal,

Output volume control for left line output = 0 dB, for

Dynamic range, A-weighted

class-D = 0 dB

Output common mode setting = 1.35 V, Fs = 48 kHz

1 kHz, 0 dB full-scale input signal,

Output volume control for left line output = –4.5 dB, for

1.77%

Total harmonic distortion

class-D = 6 dB

-35

Output common mode setting = 1.35 V, Fs = 48 kHz, 1 W

output power

1 kHz, –6 dB full-scale input signal,

Output volume control for left line output = –4.5 dB, for

0.056%

0.316%

Total harmonic distortion

class-D = 6 dB

-65

-50

Output common mode setting = 1.35 V, Fs = 48 kHz, 250

mW output power

217 Hz Signal applied to SPVDD

Power supply rejection ratio

1 kHz Signal applied to SPVDD

1 kHz, 0 dB input full-scale signal,

Gain Error

Output volume control = 0 dB,

-1.6

Output common mode setting = 1.35 V, Fs = 48 kHz

DAC DIGITAL INTERPOLATION – FILTER Fs = 48-ksps

Passband

0.45 × Fs

Passband ripple

±0.06

Transition band

0.45 × Fs

0.55 × Fs

Stopband

0.55 × Fs

7.5 × Fs

Stopband attenuation

Group delay

21/Fs

DIGITAL I/O

0.3 ×

VIL

Input low level

–0.3

IOVDD

IOVDD > 1.6 V

0.7 × IOVDD

VIH

Input high level(3)

IOVDD < 1.6 V

1.1

0.1 ×

VOL

Output low level

IOVDD

VOH

Output high level

0.8 × IOVDD

(3)

When IOVDD < 1.6V, minimum VIH is 1.1V.

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