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4967DS–RFID–10/08

ATA5577 [Preliminary]

4.1

Analog Front End (AFE)

The AFE includes all circuits that are directly connected to the coil terminals. It generates the

IC's power supply and handles the bi-directional data communication with the reader. It consists

of the following blocks:

• Rectifier to generate a DC supply voltage from the AC coil voltage

• Clock extractor

• Switchable load between Coil 1 and Coil 2 for data transmission from the tag to the reader

• Field-gap detector for data transmission from the base station to the tag

• ESD-protection circuitry

4.2

Data-rate Generator

The data rate is binary programmable to operate at any even-numbered data rate between RF/2

and RF/128 or to any of the fixed Basic mode data rates (RF/8, RF/16, RF/32, RF/40, RF/50,

RF/64, RF/100 and RF/128).

4.3

Write Decoder

The write decoder detects the write gaps and verifies the validity of the data stream according to

the Atmel e555x downlink protocol (pulse interval encoding).

4.4

HV Generator

This on-chip charge pump circuit generates the high voltage required to program the EEPROM.

4.5

DC Supply

Power is externally supplied to the IDIC via the two coil connections. The IC rectifies and regu-

lates this RF source and uses it to generate its supply voltage.

4.6

Power-On Reset (POR)

The power-on reset circuit blocks the voltage supply to the IDIC until an acceptable voltage

threshold has been reached.

4.7

Clock Extraction

The clock extraction circuit uses the external RF signal as its internal clock source.

4.8

Controller

The control logic module executes the following functions:

• Load mode register with configuration data from EEPROM block 0 after power-on and during

reading

• Load option register with the settings for the analog front end stored in EEPROM page 1

block 3 after power-on and during reading

• Control all EEPROM memory read/write access and data protection

• Handles the downlink command decoding detecting protocol violations and error conditions