2

2314E–FPSLI–6/05

AT94S Secure Family

– 20 mA Sink/Source High-performance I/O Structures

– All FPGA I/O Individually Programmable

1.

Description

The AT94S Series (Secure FPSLIC family) shown in Table 1-1 is a combination of the popular

Atmel AT40K Series SRAM FPGAs, the AT17 Series Configuration Memories and the high-per-

formance Atmel AVR 8-bit RISC microcontroller with standard peripherals. Extensive data and

instruction SRAM as well as device control and management logic are included in this multi-chip

module (MCM).

The embedded AT40K FPGA core is a fully 3.3V PCI-compliant, SRAM-based FPGA with dis-

tributed 10 ns programmable synchronous/asynchronous, dual-port/single-port SRAM, 8 global

clocks, Cache Logic ability (partially or fully reconfigurable without loss of data) and 5,000 to

40,000 usable gates.

Table 1-1.

The AT94S Series Family

Device

AT94S05AL

AT94S10AL

AT94S40AL

Configuration Memory Size

1 Mbit

1 Mbit

1 Mbit

FPGA Gates

5K

10K

40K

FPGA Core Cells

256

576

2304

FPGA SRAM Bits

2048

4096

18432

FPGA Registers (Total)

436

846

2862

Maximum FPGA User I/O

93

137

162

AVR Programmable I/O Lines

8

16

16

Program SRAM Bytes

4K - 16K

20K - 32K

20K - 32K

Data SRAM Bytes

4K - 16K

4K - 16K

4K - 16K

Hardware Multiplier (8-bit)

Yes

Yes

Yes

2-wire Serial Interface

Yes

Yes

Yes

UARTs

2

2

2

Watchdog Timer

Yes

Yes

Yes

Timer/Counters

3

3

3

Real-time Clock

Yes

Yes

Yes

JTAG ICE

Yes

Yes

Yes

Typical AVR

Throughput

@ 25 MHz

19 MIPS

19 MIPS

19 MIPS

@ 40 MHz

30 MIPS

30 MIPS

30 MIPS

Operating Voltage

3.0 - 3.6V

3.0 - 3.6V

3.0 - 3.6V