SA56 datasheet(6/7 Pages) APEX

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APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739

OPERATING

CONSIDERATIONS

SA56

MODES OF OPERATION

The following chart shows the 3 modes of operation.

Mode

PWM

pin 12

PWM

pin 17

DIR

pin 16

OUT

pins 21, 23

OUT

pins 2, 3

2 Quadrant – Analog Mode

Connect ca-

pacitor to set

frequency

Analog control

voltage

(1 – 4V)

Low (SIG

GND)

Control voltage

greater than V

REF:

OUT – BOUT)< 0

average

voltage

Control voltage

greater than V

REF:

OUT – AOUT)> 0

average

voltage

2 Quadrant – Digital Mode

SIG

GND

Modulation In

High (V

DD)

High (V

PWM

SIG

GND

Modulation In

Low (SIG

GND)

PWM

High (V

4 Quadrant – Digital Mode

SIG

GND

High (V

DD)

Modulated In

DIR

4-QUADRANT - ANALOG MODE

The SA56 can operate in 4-quadrant mode with analog or

digital inputs. In the analog mode, the capacitor from C

PWM to

SIG

GND sets the frequency of an internal triangular ramp sig-

nal. See Figure 2. An analog voltage applied to the PWM pin

is compared to a 2.5 volt reference within the SA56 thereby

governing the duty cycle of the output. Note that the analog

pin DIR pin 16 is connected to signal ground (SIG

GND).

OPERATING WITH DIGITAL INPUTS

Two and 4-quadrant operation are possible with the SA56

when driven with a digital PWM signal from a microcontroller or

DSP. When using a digital modulation signal, tie the C

PWM pin

to SIG

GND to disable the internal oscillator and ramp generator.

When operating in the digital mode, pulse widths should be no

less than 100 ns and the switching frequency should remain

less than 500 kHz. This will allow enough time for the output

MOSFETs to reach their full on and off states before receiving

a command to reverse state.

2-QUADRANT - DIGITAL MODE

Two-quadrant operation of the FETs is realized by driving

PWM pin 17 of the SA56 with a digital PWM signal supplied

by a microcontroller or DSP, as depicted in Figure 3. When

using a digital modulation signal, connect the C

PWM pin to

SIG

GND to disable the internal oscillator and its companion

ramp generator.

A digital PWM signal applied to the PWM pin controls the

output duty cycle at one output pin while the other output pin is

held "HIGH". The input at the DIR pin (V

DD or SIGGND) governs

the output behavior. If DIR is a logic HIGH, the A

OUT output

will be held high and the B

OUT output will be switched as the

complement of the PWM input signal. The average output at

OUT will always be greater than at BOUT. Whereas if DIR is a

logic LOW, the B

OUT output will be held "HIGH" and the AOUT

output will be switched.

Operating in two-quadrant mode reduces switching noise

and power dissipation, but limits the ability to control the motor

at very low speed.

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