AT90USB646 datasheet(309/459 Pages) ATMEL

309 / 459 page

309

7593H–AVR–11/08

ATmega32U6/AT90USB64/128

• 7-3 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 2-0 - PBYCT10:8 - Byte count (high) Bits

Set by hardware. This field is the MSB of the byte count of the FIFO endpoint. The LSB part is

provided by the UPBCLX register.

• 7-0 - PBYCT7:0 - Byte Count (low) Bits

Set by the hardware. PBYCT10:0 is:

- (for OUT Pipe) increased after each writing into the Pipe and decremented after each byte

sent,

- (for IN Pipe) increased after each byte received by the host, and decremented after each byte

read by the software.

• 7 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 6-0 - PINT6:0 - Pipe Interrupts Bits

Set by hardware when an interrupt is triggered by the UPINTX register and if the corresponding

endpoint interrupt enable bit is set.

Cleared by hardware when the interrupt source is served.

Bit

765

----

PBYCT10

PBYCT9

PBYCT8

UPBCHX

Read/Write

RRR

Initial Value

Bit

76543210

PBYCT7

PBYCT6

PBYCT5

PBYCT4

PBYCT3

PBYCT2

PBYCT1

PBYCT0

UPBCLX

Read/Write

RRRRRRRR

Initial Value

00000000

Bit

76543210

PINT6

PINT5

PINT4

PINT3

PINT2

PINT1

PINT0

UPINT

Read/Write

Initial Value

00000000

AT90USB646 Datasheet(PDF) 309 Page - ATMEL Corporation

AT90USB646 Datasheet(HTML) 309 Page - ATMEL Corporation

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