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TAS5709PHPR Datasheet(PDF) 19 Page - Texas Instruments |
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TAS5709PHPR Datasheet(HTML) 19 Page - Texas Instruments |
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19 / 59 page ![]() I 2C COMPATIBLE SERIAL CONTROL INTERFACE SERIAL INTERFACE CONTROL AND TIMING I2S Timing 23 22 SCLK 32Clks LRCLK(NoteReversedPhase) LeftChannel 24-BitMode 1 19 18 20-BitMode 16-BitMode 15 14 MSB LSB 32Clks RightChannel 2-ChannelI S(PhilipsFormat)StereoInput 2 T0034-01 5 4 9 8 1 0 0 4 5 1 0 23 22 1 19 18 15 14 MSB LSB 5 4 9 8 1 0 0 4 5 1 0 SCLK TAS5709 www.ti.com........................................................................................................................................................................................... SLOS599 – NOVEMBER 2008 Finally, the PWM section has an adjustable maximum modulation limit of 93.8% to 99.2%. For detailed description of using audio processing features like DRC, EQ, 3D, and Bass Boost, please refer to User's Guide and TAS570X GDE software development tool documentation. Also refer to GDE software development tool for device data path. The TAS5709 DAP has an I2C serial control slave interface to receive commands from a system controller. The serial control interface supports both normal-speed (100-kHz) and high-speed (400-kHz) operations without wait states. As an added feature, this interface operates even if MCLK is absent. The serial control interface supports both single-byte and multi-byte read and write operations for status registers and the general control registers associated with the PWM. I2S timing uses LRCLK to define when the data being transmitted is for the left channel and when it is for the right channel. LRCLK is low for the left channel and high for the right channel. A bit clock running at 32, 48, or 64 × fS is used to clock in the data. There is a delay of one bit clock from the time the LRCLK signal changes state to the first bit of data on the data lines. The data is written MSB first and is valid on the rising edge of bit clock. The DAP masks unused trailing data bit positions. NOTE: All data presented in 2s-complement form with MSB first. Figure 17. I2S 64-fS Format Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Link(s): TAS5709 |
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