July 2006

V0.21P

-10-

0

EN_ARA_STS

R/W

Set to 1, ALERT de-asserted condition is related with ARA.

Set to 0, ALERT de-asserted condition is not related with ARA(Alert Response

Address).

7.7 Chip ID I Register

 Index 5Ah

Power on default: 03h.

7.8 Chip ID II Register

 Index 5Bh

Power on default: 03h.

7.9 Vendor ID I (Manufacturer ID) Register

 Index 5Dh

Power on default: 19h.

7.10 Vendor ID I (Manufacturer ID) Register

 Index 5Eh

Power on default: 34h.

7.11 Vendor ID II (Manufacturer ID) Register

 Index FEh

Power on default: 23h. (programmable)

7.12 Value RAM

 Index 10h- 2Fh

VT1 : Local Temperature

VT2 : Remote Temperature

The value in quota is its power-on default value

.

Description

Attribute

Read Address

(High Byte)

Read Address

(Low Byte)

Write Address

(High Byte)

Write Address

(Low Byte)

VT1 reading

RO

00h

1Ah

VT2 reading

RO

01h

10h

VT1 High Limit

R/W

0Bh

1Bh

VT1 Low Limit

R/W

0Ch

1Ch

VT2 High Limit

R/W

0Dh

13h