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HV508 Datasheet(PDF) 3 Page - Supertex, Inc |
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HV508 Datasheet(HTML) 3 Page - Supertex, Inc |
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3 / 3 page ![]() 3 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 • FAX: (408) 222-4895 www.supertex.com 12/13/010 ©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. HV508 Timing Diagram Block Diagram LVIN HVIN VDD HVEN POL GND CMOS Logic Level Translator Level Translator Level Translator Level Translator HVOUT1 HVOUT2 GND 50% 80% 5% 50% t(OFF) t(ON) POL HVOUT1 VIL VIH VIN or LVIN Figure 1 LVIN 50% 80% tEN(ON) HVEN HVOUT1 VIL VIH HVIN Figure 2 Truth Table HV EN POL HV OUT1 HV OUT2 HH HV IN GND HL GND HV IN LH LV IN GND LL GND LV IN |
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