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HV583 Datasheet(PDF) 3 Page - Supertex, Inc |
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HV583 Datasheet(HTML) 3 Page - Supertex, Inc |
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3 / 6 page ![]() 3 HV583 Symbol Parameter Min Typ Max Units Conditions twclk Clock pulse width, high and low 10 ns V DD =4.5V to 5.5V, Tj=-25 °C to 125°C twLE LE pulse width, high and low 10 ns tsu1 Setup time, DAs, DBs to clk 5 ns tsu2 Setup time, clk to LE 10 ns tsu3 Setup time, LE to OL, OH 25 ns th1 Hold time, clk to DAs, DBs 5 ns th2 Hold time, LE to clk 10 ns tpdHL Clk to DAs, DBs 25 ns C=15pF tpdLH Clk to DAs, DBs 25 ns C=15pF tpHL LE, OH, OL to HVout 150 ns C=50pF tpLH LE, OH, OL to HVout Typ -20 tpHL+tf Typ +40 ns C=80pF tpHZL OE to HVout 150 ns C=50pF tpLZH OE to HVout Typ -20 tpHL+tf Typ +40 ns C=80pF tpHZ OE to HVout 300 ns Rl=10K, C=50pF tpLZ OE to HVout 300 ns Rl=10K, C=50pF tr HVout 120 ns C=50pF tf HVout 120 ns C=50pF AC Electrical Characteristics (Tj = 25°C, V DD = 5V, VPP = 80V) V DD =4.5V to 5.5V, Tj=-25 °C to 125°C Shift Register Truth Table DIR Clk State of Shift Register Shift Direction L or open L to H Shift D XB to DXA L or open H to L Hold D XB to DXA HL to H Shift D XA to DXB HH to L Hold D XA to DXB Latch Truth Table LE Output State of Latch L to H Latch execution H to L Hold HVout Truth Table OE OL OH DA/DB HVout LX X X Z HL X X L HH L X H HH H L L HH HHH H = Level High L = Level Low X = Don’t care. Can be High or Low Z = High impedance. Open circuit. |
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