TC4404 datasheet(2/6 Pages) TELCOM

2 / 6 page

4-220

TELCOM SEMICONDUCTOR, INC.

ABSOLUTE MAXIMUM RATINGS

Supply Voltage ......................................................... +22V

Maximum Chip Temperature ................................. +150

°C

Storage Temperature Range ................ – 65

°C to +150°C

Lead Temperature (Soldering, 10 sec) ................. +300

°C

ELECTRICAL CHARACTERISTICS:

Specifications measured at TA = +25°C with 4.5V ≤ VDD ≤ 18V, unless otherwise specified.

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

Input

VIH

Logic 1 High Input Voltage

2.4

—

VIL

Logic 0 Low Input Voltage

—

0.8

IIN

Input Current

– 0V

≤ V

– 1

—

µA

Output

VOH

High Output Voltage

VDD – 0.025

—

VOL

Low Output Voltage

—

0.025

Output Resistance

IOUT = 10 mA,VDD = 18V; Any Drain

—

Ω

IPK

Peak Output Current (Any Drain)

Duty cycle < 2%, t

≤ 300µsec

—

1.5

—

IDC

Continuous Output Current (Any Drain)

—

100

Latch-Up Protection (Any Drain)

Duty cycle < 2%, t

≤ 300µsec

> 500

—

Withstand Reverse Current

Switching Time (Note 1)

Rise Time

Figure 1, CL = 1000 pF

—

nsec

Fall Time

Figure 1, CL = 1000 pF

—

nsec

tD1

Delay Time

Figure 1, CL = 1000 pF

—

nsec

tD2

Delay Time

Figure 1, CL = 1000 pF

—

nsec

Power Supply

Power Supply Current

VIN = 3V (Both Inputs)

—

4.5

VIN = 0V (Both Inputs)

—

0.4

NOTE:

1. Switching times guaranteed by design.

thus minimizing chip count. Unused open drains should be

returned to the supply rail that their device sources are

connected to (pull-downs to ground, pull-ups to VDD), to

prevent static damage. In addition, in situations where

timing resistors or other means of limiting crossover currents

are used, like drains may be paralleled for greater current

carrying capacity.

These devices are built to operate in the most de-

manding electrical environments. They will not latch up

under any conditions within their power and voltage rat-

ings; they are not subject to damage when up to 5V of

noise spiking of either polarity occurs on their ground pin;

and they can accept, without damage or logic upset, up to

1/2 amp of reverse current (of either polarity) being forced

back into their outputs. All terminals are fully protected

against up to 2 kV of electrostatic discharge.

Package Thermal Resistance

CerDIP RθJ-A ............................................... 150°C/W

CerDIP RθJ-C ................................................. 55°C/W

PDIP RθJ-A .................................................. 125°C/W

PDIP RθJ-C .................................................... 45°C/W

SOIC RθJ-A .................................................. 155°C/W

SOIC RθJ-C .................................................... 45°C/W

Operating Temperature Range

C Version ............................................... 0

°C to +70°C

E Version .......................................... – 40

°C to +85°C

M Version ....................................... – 55

°C to +125°C

Package Power Dissipation (TA ≤ 70°C)

Plastic ............................................................. 730mW

CerDP ............................................................. 800mW

SOIC ............................................................... 470mW

*Static-sensitive device. Unused devices must be stored in conductive

material. Protect devices from static discharge and static fields. Stresses

above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. These are stress ratings only and functional

operation of the device at these or any other conditions above those

indicated in the operational sections of the specifications is not implied.

Exposure to Absolute Maximum Rating Conditions for extended periods

may affect device reliability.

TC4404

TC4405

1.5A DUAL OPEN-DRAIN

MOSFET DRIVERS

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