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LT3580

3580fc

APPLICATIONS INFORMATION

Using the circuit in Figure 14 as an example, Table 3 shows

the parameters used to generate the bode plot shown in

Figure 5. Note that R2 is 14.6k ||14.6k = 7.3k which is the

effective small signal resistance looking into the FB pin

of the LT3580.

Table 3. Bode Plot Parameters

PARAMETER

VALUE

UNITS

COMMENT

21.8

Application Speciﬁc

COUT

μF

Application Speciﬁc

RESR

mΩ

Application Speciﬁc

305

kΩ

Not Adjustable

1000

Adjustable

CPL

0pF

Optional/Adjustable

kΩ

Adjustable

130

kΩ

Adjustable

7.3

kΩ

Not Adjustable

VREF

1.215

Not Adjustable

VOUT

Application Speciﬁc

VIN

Application Speciﬁc

gma

230

μmho

Not Adjustable

gmp

7mho

Not Adjustable

4.2

μH

Application Speciﬁc

1.2

MHz

Adjustable

In Figure 5, the phase is –140° when the gain reaches 0dB

giving a phase margin of 40°. The crossover frequency

is 10kHz, which is more than three times lower than the

frequency of the RHP zero to achieve adequate phase

margin.

Diode Selection

Schottky diodes, with their low forward voltage drops and

fast switching speeds, are recommended for use with the

LT3580. The Microsemi UPS120 is a very good choice.

Where the input-to-output voltage differential exceeds 20V,

use the UPS140 (a 40V diode). These diodes are rated to

handle an average forward current of 1A.

Oscillator

The operating frequency of the LT3580 can be set by the

internal free-running oscillator. When the SYNC pin is

driven low (< 0.4V), the frequency of operation is set by a

resistor from RT to ground. An internally trimmed timing

capacitor resides inside the IC. The oscillator frequency

is calculated using the following formula:

fOSC =

91.9

(RT + 1)

where fOSC is in MHz and RT is in kΩ. Conversely, RT

(in kΩ) can be calculated from the desired frequency (in

MHz) using:

RT =

91.9

fOSC

Clock Synchronization

The operating frequency of the LT3580 can be synchro-

nized to an external clock source. To synchronize to the

external source, simply provide a digital clock signal into

the SYNC pin. The LT3580 will operate at the SYNC clock

frequency. The LT3580 will revert to the internal free-run-

ning oscillator clock after SYNC is driven low for a few

free-running clock periods.

Driving SYNC high for an extended period of time effec-

tively stops the operating clock and prevents latch SR1

from becoming set (see the Block Diagram). As a result,

the switching operation of the LT3580 will stop.

The duty cycle of the SYNC signal must be between 35%

and 65% for proper operation. Also, the frequency of the

SYNC signal must meet the following two criteria:

Figure 5. Bode Plot for Example Boost Converter

FREQUENCY (Hz)

100

120

140

100

10k

100k

3580 F05

–20

160

180

–120

–100

–80

–60

–40

–140

–160

–180

–200

–20

40° AT

10kHz

PHASE

GAIN

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