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LTC4309IGN-PBF Datasheet(PDF) 1 Page - Linear Technology |
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LTC4309IGN-PBF Datasheet(HTML) 1 Page - Linear Technology |
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1 / 16 page ![]() LTC4309 1 4309fa The LTC®4309 hot swappable 2-wire bus buffer allows I/O card insertion into a live backplane without corrup- tion of the data and clock busses. The LTC4309 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Low offset and high VOL tolerance allows cascading of multiple devices on the clock and data busses. If SDAOUT or SCLOUT are low for 30ms, FAULT will pull low indicating a stuck bus low condition. If DISCEN is tied high, the LTC4309 will automatically break the bus connection and generate up to 16 clock pulses and a stop bit in an attempt to free the bus. A connection will resume if the stuck bus is cleared. If DISCEN is connected to GND, the busses will remain connected with no clock or stop bit generation. ACC input enables rise-time accelerators for high capacitively loaded busses. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. When driven high, the ENABLE input allows the LTC4309 to connect after a stop bit or bus idle. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open drain output which indicates that the backplane and card sides are connected. Level Shifting Low Offset Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery n Live Board Insertion n Servers n Capacitance Buffer/Bus Extender n RAID Systems n ATCA n Bidirectional Buffer Increases Fanout n 60mV Buffer Offset Independent of Load n Optional Disconnect when Bus is Stuck Low n Prevents SDA and SCL Corruption During Live Board Insertion and Removal from Backplane n Level Shift 2.5V, 3.3V and 5V Busses n Compatible with Non-Compliant VOL I2C Devices n ±6kV Human Body Model ESD Ruggedness n Isolates Input SDA and SCL Lines from Output n Compatible with I2C™, I2C Fast-Mode and SMBus n READY Open Drain Output n FAULT Open Drain Output n 1V Precharge on All SDA and SCL Lines n Optional Rise Time Accelerators n High Impedance SDA, SCL Pins for VCC = 0 n Available in Small 12-Pin DFN (4mm x 3mm) and 16-Lead SSOP Packages Rising Edge from Asserted Low 4309 TA01 ENABLE EN SCLIN SDAIN SCL1 SDA1 FAULT ACC VCC GND SCLOUT SDAOUT SCL2 SDA2 LTC4309 READY 3.3V 5V 3.3V 3.3V 10k 10k 10k 2.7k 2.7k 10k ENABLE VCC2 VCC2 SCLIN CARD CONNECTOR BACKPLANE CONNECTOR SDAIN FAULT ACC VCC GND SCLOUT SDAOUT LTC4309 READY 5V 5V 10k 100k 10k 10k 0.01μF 0.01μF 10k FAULT FAULT DISCEN DISCEN 100ns/DIV 0 0 200 400 600 800 1000 100 200 300 400 4309 G01 500 600 SDAOUT SDAIN LOW OFFSET TYPICAL APPLICATION FEATURES APPLICATIONS DESCRIPTION L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6356140, 6650174, 7032051. |
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