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LTC4446

4446f

OPERATION

both the high side and low side MOSFETs conducting,

signiﬁcant cross-conduction current will ﬂow through the

MOSFETs from VIN to ground and will cause substantial

power loss. A similar effect occurs on TG due to the CGS

and CGD capacitances of the high side MOSFET.

The powerful output driver of the LTC4446 reduces the

switching losses of the power MOSFET, which increase

with transition time. The LTC4446’s high side driver is

capable of driving a 1nF load with 8ns rise and 5ns fall

times using a bootstrapped supply voltage VBOOST-TS of

12V while its low side driver is capable of driving a 1nF

Power Dissipation

To ensure proper operation and long-term reliability, the

LTC4446 must not operate beyond its maximum tem-

perature rating. Package junction temperature can be

calculated by:

TJ = TA + PD (θJA)

where:

TJ = Junction temperature

TA = Ambient temperature

PD = Power dissipation

θJA = Junction-to-ambient thermal resistance

Power dissipation consists of standby and switching

power losses:

PD = PDC + PAC + PQG

where:

PDC = Quiescent power loss

PAC = Internal switching loss at input frequency, fIN

PQG = Loss due turning on and off the external MOSFET

with gate charge QG at frequency fIN

load with 6ns rise and 3ns fall times using a supply volt-

age VCC of 12V.

Undervoltage Lockout (UVLO)

The LTC4446 contains an undervoltage lockout detector

that monitors VCC supply. When VCC falls below 6.15V,

the output pins BG and TG are pulled down to GND and

TS, respectively. This turns off both external MOSFETs.

When VCC has adequate supply voltage, normal operation

will resume.

APPLICATIONS INFORMATION

The LTC4446 consumes very little quiescent current. The

DC power loss at VCC = 12V and VBOOST-TS = 12V is only

(350μA)(12V) = 4.2mW.

At a particular switching frequency, the internal power loss

increases due to both AC currents required to charge and

discharge internal node capacitances and cross-conduc-

tion currents in the internal logic gates. The sum of the

quiescent current and internal switching current with no

load are shown in the Typical Performance Characteristics

plot of Switching Supply Current vs Input Frequency.

The gate charge losses are primarily due to the large AC

currents required to charge and discharge the capacitance

of the external MOSFETs during switching. For identical

pure capacitive loads CLOAD on TG and BG at switching

frequency fIN, the load losses would be:

PCLOAD = (CLOAD)(f)[(VBOOST-TS)2 + (VCC)2]

In a typical synchronous buck conﬁguration, VBOOST-TS

is equal to VCC – VD, where VD is the forward voltage

drop across the diode between VCC and BOOST. If this

drop is small relative to VCC, the load losses can be

approximated as:

PCLOAD = 2(CLOAD)(fIN)(VCC)2

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