LTC6912

23

6912fa

DE/UE Package

12-Lead Plastic DFN (4mm

× 3mm)

(Reference LTC DWG # 05-08-1695)

4.00

±0.10

(2 SIDES)

3.00

±0.10

(2 SIDES)

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

NOTE:

1. DRAWING PROPOSED TO BE A VARIATION OF VERSION

(WGED) IN JEDEC PACKAGE OUTLINE M0-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

0.38

± 0.10

BOTTOM VIEW—EXPOSED PAD

1.70

± 0.10

(2 SIDES)

0.75

±0.05

R = 0.115

TYP

R = 0.20

TYP

0.25

± 0.05

3.30

±0.10

(2 SIDES)

1

6

12

7

0.50

BSC

PIN 1

NOTCH

PIN 1

TOP MARK

(NOTE 6)

0.200 REF

0.00 – 0.05

(UE12/DE12) DFN 0603

0.25

± 0.05

3.30

±0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1.70

±0.05

(2 SIDES)

2.20

±0.05

0.50

BSC

0.65

±0.05

3.50

±0.05

PACKAGE OUTLINE

PACKAGE DESCRIPTIO

GN Package

16-Lead Plastic SSOP (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1641)

GN16 (SSOP) 0204

12

3

4

5

6

7

8

.229 – .244

(5.817 – 6.198)

.150 – .157**

(3.810 – 3.988)

16 15 14 13

.189 – .196*

(4.801 – 4.978)

12 11 10 9

.016 – .050

(0.406 – 1.270)

.015

± .004

(0.38

± 0.10)

× 45°

0

° – 8° TYP

.007 – .0098

(0.178 – 0.249)

.0532 – .0688

(1.35 – 1.75)

.008 – .012

(0.203 – 0.305)

TYP

.004 – .0098

(0.102 – 0.249)

.0250

(0.635)

BSC

.009

(0.229)

REF

.254 MIN

RECOMMENDED SOLDER PAD LAYOUT

.150 – .165

.0250 BSC

.0165

±.0015

.045

±.005

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

INCHES

(MILLIMETERS)

NOTE:

1. CONTROLLING DIMENSION: INCHES

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.